\doxysubsubsubsection{SPI1 Clock Source }
\hypertarget{group___r_c_c_ex___s_p_i1___clock___source}{}\label{group___r_c_c_ex___s_p_i1___clock___source}\index{SPI1 Clock Source@{SPI1 Clock Source}}
\doxysubsubsubsubsubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\Hypertarget{group___r_c_c_ex___s_p_i1___clock___source_gabbdeb6c96aac75c07b302bae4c6c0b2b}\label{group___r_c_c_ex___s_p_i1___clock___source_gabbdeb6c96aac75c07b302bae4c6c0b2b} 
\#define {\bfseries RCC\+\_\+\+SPI1\+CLKSOURCE\+\_\+\+PLL}~RCC\+\_\+\+SPI123\+CLKSOURCE\+\_\+\+PLL
\item 
\Hypertarget{group___r_c_c_ex___s_p_i1___clock___source_gaf491e11fcf9e4679e597fd197566d6c6}\label{group___r_c_c_ex___s_p_i1___clock___source_gaf491e11fcf9e4679e597fd197566d6c6} 
\#define {\bfseries RCC\+\_\+\+SPI1\+CLKSOURCE\+\_\+\+PLL2}~RCC\+\_\+\+SPI123\+CLKSOURCE\+\_\+\+PLL2
\item 
\Hypertarget{group___r_c_c_ex___s_p_i1___clock___source_ga5f0417c75283aff4beb14b1009d068d0}\label{group___r_c_c_ex___s_p_i1___clock___source_ga5f0417c75283aff4beb14b1009d068d0} 
\#define {\bfseries RCC\+\_\+\+SPI1\+CLKSOURCE\+\_\+\+PLL3}~RCC\+\_\+\+SPI123\+CLKSOURCE\+\_\+\+PLL3
\item 
\Hypertarget{group___r_c_c_ex___s_p_i1___clock___source_gad40a036bb750300c63ffac56f35771f2}\label{group___r_c_c_ex___s_p_i1___clock___source_gad40a036bb750300c63ffac56f35771f2} 
\#define {\bfseries RCC\+\_\+\+SPI1\+CLKSOURCE\+\_\+\+PIN}~RCC\+\_\+\+SPI123\+CLKSOURCE\+\_\+\+PIN
\item 
\Hypertarget{group___r_c_c_ex___s_p_i1___clock___source_gac2e7094879a190124fe075d2c91e3bee}\label{group___r_c_c_ex___s_p_i1___clock___source_gac2e7094879a190124fe075d2c91e3bee} 
\#define {\bfseries RCC\+\_\+\+SPI1\+CLKSOURCE\+\_\+\+CLKP}~RCC\+\_\+\+SPI123\+CLKSOURCE\+\_\+\+CLKP
\end{DoxyCompactItemize}


\doxysubsubsubsubsection{Detailed Description}
